Yao Chen
English 中文

Yao Chen 陈瑶

Assistant Professor (Research Track)
National University of Singapore, Singapore
E-mail:  yaochen@nus.edu.sg
Address: 15 Computing Drive, Com2-02-02, Singapore, 117418
Phone:   +65 8376 7292
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助理教授（研究序列）
新加坡国立大学，新加坡
邮箱：  yaochen@nus.edu.sg
地址：  15 Computing Drive, Com2-02-02, Singapore, 117418
电话：  +65 8376 7292
主页 | 谷歌学术 | ResearchGate

I am a Research Assistant Professor at the Department of Computer Science, School of Computing, National University of Singapore (NUS). Before joining NUS, I was a Senior Research Scientist with the Advanced Digital Sciences Center (ADSC), a research center of the University of Illinois at Urbana-Champaign (UIUC) based in Singapore.

Currently, I am working with Prof. Bingsheng He and Prof. Weng-Fai Wong at the NUS on quite some interesting projects.

我是新加坡国立大学计算机科学系的助理研究教授。在加入新加坡国立大学之前, 我是伊利诺伊大学香槟分校高级数字科学研究中心（ADSC）的高级研究科学家。

目前，我正与Bingsheng He教授 及 Weng-Fai Wong教授共同从事一些有趣的研究。


Research interests 研究方向

  • Domain-specific FPGA-based accelerators: FPGA enabled domain-specific architectures
  • Software/hardware co-designed efficient systems: ML/Graph accelerators, on-device AI
  • Electronic design automation (EDA): domain-specific high level synthesis (HLS), domain-specific architecture generation
  • 领域专用加速器：基于FPGA的领域专用架构
  • 软硬件协同设计：高效的机器学习、图计算加速器，端侧人工智能
  • 电子设计自动化（EDA）：领域专用高层次综合（HLS），领域专用架构自动生成

As Principle Investigator (PI)

  1. OctoBrain: A privacy-preserving edge-cloud collaborative learning solution for lift systems.
    Singapore Cybersecurity Consortium (SGCSC). SGD $178,560: 2021 - 2022.
  2. Pooling large scale heterogeneous Processors.
    Alibaba Innovation Research (AIR) Funding. USD 140K: 2017 - 2019.

As Co-Principle Investigator (Co-PI)

  1. Real-time deep learning networks for fraud detection in modern e-marketplace systems.
    AISG. SGD $3.3M: 2022 - 2025.
  2. Dynamic Graph Random Walks on FPGAs.
    ByteDance. SGD 150K: 2023 - 2024.
  3. Towards Energy-Efficient Tera Scale Graph Processing on FPGAs.
    Google Research. SGD 50K: 2023 - 2024.

As a collaborator and/or Area Lead

  1. Memory Efficient Graph Accelerators on HLS-based FPGAs.
    Ministry of Education, Academic Research Fund (AcRF) Tier 2. SGD 577K:2022 - 2025.
  2. GraphMind: Energy-Efficient Hardware Accelerators for Graph Neural Networks.
    NUS Advanced Research and Technology Innovation Center. SGD 362K: 2021 - 2024.
  3. Software-Hardware co-design for real-time AI.
    TSCP. SGD $15M: 2017 - 2022.
  • Techlaunch, Management of Technology, National University of Singapore, School of Engineering. (2021.1 - 2021.4)
  • 2023 AMD HACC Outstanding Researcher Award
  • 2021 6th Place winner in 2021 RadioML Challenge
  • 2021 Second Place winner (FPGA track), IEEE Design Automation Conference (DAC) System Design Contest
  • 2020 Third Place winner (FPGA track), 2020 Design Automation Conference (DAC) System Design Contest
  • 2019 First Place winner (FPGA track), IEEE Design Automation Conference (DAC) System Design Contest
  • 2019 Best poster award, ICML Workshop 2019
  • 2010 Best Undergraduate Research Award, Nankai University

Software License

  1. Low Loss DNN Quantization Package, SGD 2.5K/year, 2021.

Patents

  1. A GPU acceleration method for spike sorting. R. Cai, K. Zhao, J. He, Y. Chen, Z. Hao, W. Wen, B. Chen. patent No. CN109460785A.
  2. A CUDA based spike sorting acceleration method on GPU. R. Cai, K. Zhao, J. He, Y. Chen, Z. Hao, W. Wen, B. Chen. patent No. CN109376651A.
  3. Bi-CMOS based Fifth Order High Accuracy Temperature Compensated Circuit. C. Lin, Z. Guo, H. Xu, Y. Chen, K. Liang, G. Li. patent No. 201610443932.2.
  4. Fifth Order High Accuracy Temperature Compensated Crystal Oscillator ASIC Design. C. Lin, Z. Guo, H. Xu, K. Liang, Y. Chen, G. Li. patent No. 201610443932.2.
  5. Nandflash Based Data Acquisition System. X. Gao, L. Wang, Y. Chen. patent No. CN20111005119.8.
  6. IC Card Identity Authentication System Used in Public Transportation. Y. Chen, P. Chang, L. Wang, R. Chen, H. Wu. patent No. ZL200810152397.0.

Invited Talk

  1. [2025] Revisiting CAM on FPGAs. Singapore, NUS-HUST international workshop, 2025.
  2. [2024] From Applications to Efficient Architectures on FPGAs. Shenzhen, China, CCF ESTC 2024
  3. [2024] Parallel Graph Processing on FPGAs. National Defence University, China, 2024.
  4. [2024] From Applications to Efficient Architectures. Wuhan University, China, 2024.
  5. [2024] Domain-specific architectures for modern data intensive applications. University of Electronic Science and Technology China, China, 2024.
  6. [2023] Efficient Graph Processing Architectures. National Defence University, China, 2023. (Virtual)
  7. [2021] Model, Accelerator and System for an Object Detection. Invited talk at Nankai University, 2021. (Virtual)
  8. [2021] DNN Acceleration on the Edge. Invited talk at Zhejiang University, 2021. (Virtual)
  9. [2021] Machine Learning Acceleration for Cyber Security. Invited talk at Create Webinar, Singapore, 2021. (Virtual)
  10. [2021] Deep Neural Networks on FPGAs. Invited talk at Leibniz AI Lab, Leibniz University Hannover, Hannover, Germany, 2021. (Virtual)
  11. [2020] DNN Acceleration: A Cloud to Edge Approach. Invited talk at College of Computer Science, Nankai University, Tianjin China, 2020

Workshop Presentation

  1. [2023] Efficient Architecture for Green Graph Processing on FPGAs. NRF-FRC Green Computing Workshop, Singapore, 2023.
  2. [2021] Low Loss DNN Model Quantization. ADSC workshop, Singapore, 2021. (Virtual)

Paper Presentation

  1. [2022] YOLO-ReT: Towards High Accuracy Real-time Object Detection on Edge GPUs. WACV Conference, 2022. (Virtual)
  2. [2022] HiKonv: High Throughput Quantized Convolution With Novel Bit-wise Management and Computation. ASP-DAC Conference, 2022. (Virtual)
  3. [2020] HaoCL: Harnessing Large-scale Heterogeneous Processors Made Easy. ICDCS Conference, Singapore, 2020. (Virtual)
  4. [2019] T-DLA: An Open-source Deep Learning Accelerator for Ternarized DNN Models on Embedded FPGA. ISVLSI Conference, Miami, Florida, USA, 2019
  5. [2019] Cloud-DNN: An Open Framework for Mapping DNN Models to Cloud FPGAs. FPGA Conference, Seaside, CA, US, 2019

Associate Editor

  • 2023 - present: ACM Transactions on Reconfigurable Technology and Systems (TRETS)
  • 2023 - present: Frontiers in Electronics

Assistant Editor

  • NRF FRC Green Computing Report (NRF Singapore), 2023

Conference Chairs

TPC Members

  • 2025: SC, HiPC, DATE, IEEE BigData, FCCM, ICCAD, ASAP
  • 2024: ICDCS, ICCAD, ICDE (poster session)
  • 2023: ICCAD, BigData, DATE
  • 2022: ICCAD, ICCD, AAAI
  • 2021: AIOTS, CCGRID

Journal Review

  • IEEE Transactions on Computers (TC)
  • IEEE Transactions on Parallel and Distributed Systems (TPDS)
  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)
  • IEEE Design and Test (IEEE D&T)
  • ACM Transactions on Architecture and Code Optimization (TACO)
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI)
  • IEEE Journal on Emerging and Selected Topics in Circuits and Systems
  • IEEE Transactions on Network Science and Engineering
  • ACM Transactions on Design Automation of Electronic Systems (TODAES)
  • CCF Transactions on High Performance Computing
  • Micromachines

Panel Review

  • DTC Research Grant Call, Singapore, 2023